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TMS320LF2406 DSP单片机解密

0 次 时间:2009-08-27 / 09:51:31 来源:夏生

TMS320LF2406  DSP单片机特性 :

  • High-Performance Static CMOS Technology
    • 33-ns Instruction Cycle Time (30 MHz)
    • 30-MIPS Performance
    • Low-Power 3.3-V Design
  • Based on TMS320C2xx DSP CPU Core
    • Code-Compatible With F243/F241/C242
    • Instruction Set and Module Compatible With F240/C240
  • On-Chip Memory
    • Up to 32K Words x 16 Bits of Flash EEPROM (4 Sectors)
    • Up to 2.5K Words x 16 Bits of Data/Program RAM
      • 544 Words of Dual-Access RAM
      • Up to 2K Words of Single-Access RAM
  • Boot ROM
    • SCI/SPI Bootloader
  • Two Event-Manager (EV) Modules (EVA and EVB), Each Include:
    • Two 16-Bit General-Purpose Timers
    • Eight 16-Bit Pulse-Width Modulation (PWM) Channels Which Enable:
      • Three-Phase Inverter Control
      • Center- or Edge-Alignment of PWM Channels
      • Emergency PWM Channel Shutdown With External PDPINTx\ Pin
    • Programmable Deadband (Deadtime) Prevents Shoot-Through Faults
    • Three Capture Units For Time-Stamping of External Events
    • On-Chip Position Encoder Interface Circuitry
    • Synchronized Analog-to-Digital Conversion
    • Designed for AC Induction, BLDC, Switched Reluctance, and Stepper Motor Control
    • Applicable for Multiple Motor and/or Converter Control
  • Watchdog (WD) Timer Module
  • 10-Bit Analog-to-Digital Converter (ADC)
    • 8 or 16 Multiplexed Input Channels
    • 500 ns Minimum Conversion Time
    • Selectable Twin 8-Input Sequencers Triggered by Two Event Managers
  • Controller Area Network (CAN) 2.0B Module
  • Serial Communications Interface (SCI)
  • 16-Bit Serial Peripheral Interface (SPI) Module
  • Phase-Locked-Loop (PLL)-Based Clock Generation
  • Up to 40 Individually Programmable, Multiplexed General-Purpose Input/Output (GPIO) Pins
  • Up to Five External Interrupts (Power Drive Protection, Reset, and Two Maskable Interrupts)
  • Power Management:
    • Three Power-Down Modes
    • Ability to Power Down Each Peripheral Independently
  • Real-Time JTAG-Compliant Scan-Based Emulation, IEEE Standard 1149.1 (JTAG)
  • Development Tools Include:
    • Texas Instruments (TI) ANSI C Compiler, Assembler/Linker, and Code Composer Studio™ Debugger
    • Evaluation Modules
    • Scan-Based Self-Emulation (XDS510™)
    • Broad Third-Party Digital Motor Control Support
  • Package Options
    • 100-Pin LQFP PZ (LF2406)
  • Extended Temperature Options (A and S)
    • A: –40°C to 85°C
    • S: –40°C to 125°C
业务热线:
解密热线:130 6693 6900
业务QQ:1994 226
地址:广东省深圳市福田区华强北振兴路格林网苑1707室
业务邮箱:1994 226@qq.com
邮编:518000
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